Ultra-Low Power Stereo Audio Codec

High-Performance Audio Codec with Ultra-Low Power Consumption and Small Footprint for Portable Applications

Description

The MAX98091 is a fully integrated audio codec whose high-performance, ultra-low power consumption and small footprint make it ideal for portable applications.

The device features a highly flexible input scheme with six input pins that can be configured as analog or digital microphone inputs, differential or single-ended line inputs, or as full-scale direct differential inputs. Analog inputs can be routed to the record path ADC or directly to any analog output mixer.

The device accepts master clock frequencies of either 256 x fS or from 10MHz to 60MHz. The digital audio interface supports master or slave mode operation, sample rates from 8kHz to 96kHz, and standard PCM formats such as I²S, left/right-justified, and TDM.

The record/playback paths feature FlexSound® technology DSP. This includes digital gain and filtering, a biquad filter (record), dynamic range control (playback), and a seven band parametric equalizer (playback) that can improve loudspeaker performance by optimizing the frequency response.

The stereo Class D speaker amplifier provides efficient amplification, features low radiated emissions, supports filterless operation, and can drive both 4Ω and 8Ω loads. The DirectDrive® stereo Class H headphone amplifier provides a ground-referenced output eliminating the need for large DC-blocking capacitors. The device also includes a differential receiver (earpiece) amplifier that can be reconfigured as a stereo single-ended line output.

Key Features

102dB DR Stereo DAC to HP
4.1mW Playback Power Consumption
99dB DR Stereo ADC
4.5mW Record Power Consumption
3 Stereo Single-Ended/Differential Analog Microphone/Line Inputs
Two PDM Digital Microphone Inputs
Master Clock Frequencies from 256 x fS to 60MHz
I²S/LJ/RJ/TDM Digital Audio Interface
FlexSound Technology Signal Processing
- Record Path Biquad Filter
- Playback Path 7-Band Parametric EQ
- Playback Path Automatic Level Control
- Digital Filtering and Gain/Level Control
Stereo Low EMI Class D Speaker Amplifiers
- 3.2W/Channel (RL = 4Ω, VSPKVDD = 5V)
- 1.8W/Channel (RL = 8Ω, VSPKVDD = 5V)
Stereo DirectDrive Class H Headphone Amplifier Jack Detection and Identification
Differential Receiver Amplifier/Stereo Line Output
Extensive Click-and-Pop Reduction Circuitry
RF Immune Analog Inputs and Outputs
Programmable Microphone Bias
I²C Control Interface
56-Bump 0.4mm WLP Package

MAXQ1852

DeepCover Secure Microcontroller with Fast Wipe Technology and Cryptography

High-Security Microcontroller for Single-Chip PCI-PTS Smart PIN Pads

Description

DeepCover® embedded security solutions cloak sensitive data under multiple layers of advanced physical security to provide the most secure key storage possible.

The DeepCover Secure Microcontroller (MAXQ1852) is a low-power, 32-bit RISC device designed for electronic commerce, banking, and data security systems. It combines high-performance, single-cycle processing, sophisticated tamper-detection technology, and advanced cryptographic hardware to provide industry-leading data security and secret key protection.

Physical security mechanisms include environmental sensors that detect out of range voltage or temperature conditions, responding with rapid zeroization of critical data. Four external dynamic tamper sensors allow for a user-defined tamper response. An internal shield over the silicon provides protection from microprobe attacks. A high-speed internal ring oscillator is provided to thwart attacks that rely on controlling the clock rate of the chip. To protect data, the device integrates several high-speed encryption engines. Algorithms supported in hardware include AES (128-, 192-, and 256-bit), DES, triple DES (2-key and 3-key), ECDSA (160-, 192-, and 256-bit keys), DSA, RSA (up to 2048 bits), SHA-1, SHA-224, and SHA-256. The device’s advanced security features are designed to meet the stringent requirements of regulations such as ITSEC E3 High, FIPS 140-2 Level 3, and the Common Criteria certifications.

The MAXQ1852 includes 256KB of flash memory, 8KB of SRAM, 4KB of AES encryptable battery-backed SRAM, and 256-bit secure, battery-backed, flip-flop-based key storage. Several communication protocols are supported with hardware engines, including ISO 7816 for smart card applications, USB (slave interface with four end-point buffers), an RS-232 universal synchronous/asynchronous receiver-transmitter (USART), an SPI interface (master or slave mode support). Other peripherals supported on the MAXQ1852 include a true hardware random-number generator (RNG), a real-time clock (RTC), a programmable watchdog timer, and flexible 16-bit timers that support capture, compare, and pulse-width modulation (PWM) operations.

Key Features

High-Performance, Low-Power, 32-Bit MAXQ30 RISC Core
Single 3.3V Supply Enables Low Power/Flexible Interfacing
DC to 16MHz Code Execution Across Entire Operating Range
On-Chip 2x/4x Clock Multiplier
16-Bit Instruction Word, 32-Bit Internal Data Bus
16 x 32-Bit Accumulators
Virtually Unlimited Software Stack
Optimized for C-Compiler (High-Speed/Density Code)
Security Features
- 65MHz Cryptography Engine Execution to Reduce Processing Time
- ECDSA-Based Secure Loader
- Unique ID
- Tamper Detection with Fast Wipe Key/Data Destruction
- 4 External Dynamic Tamper Sensors
- Hardware AES and DES Engines
- Public Key Cryptographic Accelerator for DSA, ECDSA, and RSA
- Supports SHA-1, SHA-224, and SHA-256
- True Hardware RNG and PRNG
- Unalterable, Battery-Backed RTC
- Hardware CRC-32/16
Memory
- 256KB Flash, Composed of 2048-Byte Pages (20K Erase/Write Cycles per Sector)
- 8KB SRAM, 4KB Battery-Backed SRAM
- 256-Bit, Battery-Backed, Flip-Flop-Based Secure Key Storage
- Dedicated Cryptographic Memory Space
I/O and Peripherals
- Up to 32 General-Purpose I/O Pins
- 5V Tolerant I/O
- Power-Fail Warning
- Power-On Reset/Brownout Reset
- JTAG I/F for System Programming and Accessing On-Chip Debugger
- USB I/F with Four End-Point Buffers
- ISO 7816 Smart Card UART with FIFO
- 4 16-Bit Timer/Counters, Two with PWM Function
- SPI and USART Communication Ports
- Programmable Watchdog Timer
Low Power Consumption
- 1.1µA typ Current Draw in Battery-Backed Mode, Preserving 4KB AES Encryptable NV SRAM and 256-Bit Flip-Flop-Based Secure Master Key Storage, with Security Sensors Active (1.5µA with RTC and Active Die Shield Enabled)